80 search results - page 9 / 16 » Testing embedded-core based system chips |
HIPEAC
2009
Springer
14 years 3 months ago
2009
Springer
Process variations, which lead to timing and power variations across identically-designed components, have been identified as one of the key future design challenges by the semico...
HASE
2008
IEEE
13 years 8 months ago
2008
IEEE
In this paper, we propose a randomization based technique to verify whether a manufactured chip conforms to its design or is infected by any trojan circuit. A trojan circuit can be...
ICCAD
2000
IEEE
14 years 28 days ago
2000
IEEE
We present an error catch and analysis (ECA) system for semiconductor memories. The system consists of a test algorithm generator called TAGS, a fault simulator called RAMSES, and...
IPPS
2007
IEEE
14 years 2 months ago
2007
IEEE
The IBM Cyclops-64 (C64) chip employs a multithreaded architecture that integrates a large number of hardware thread units on a single chip. A cellular supercomputer is being deve...
JCP
2008
13 years 8 months ago
2008
Abstract--In this paper, we report some results on hardware and software co-design of an adaptive linear neuron (ADALINE) based control system. A discrete-time Proportional-Integra...