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» Testing from Formal Specifications, a Generic Approach
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APSEC
2009
IEEE
13 years 5 months ago
A Formal Framework to Integrate Timed Security Rules within a TEFSM-Based System Specification
Abstract--Formal methods are very useful in software industry and are becoming of paramount importance in practical engineering techniques. They involve the design and the modeling...
Wissam Mallouli, Amel Mammar, Ana R. Cavalli
ICCAD
2002
IEEE
142views Hardware» more  ICCAD 2002»
14 years 4 months ago
SAT and ATPG: Boolean engines for formal hardware verification
In this survey, we outline basic SAT- and ATPGprocedures as well as their applications in formal hardware verification. We attempt to give the reader a trace trough literature and...
Armin Biere, Wolfgang Kunz
EUSFLAT
2009
124views Fuzzy Logic» more  EUSFLAT 2009»
13 years 5 months ago
A toward Framework for Generic Uncertainty Management
The need for an automatic inference process able to deal with information coming from unreliable sources is becoming a relevant issue both on corporate networks and on the open Web...
Ernesto Damiani, Paolo Ceravolo, Marcello Leida
IFM
2010
Springer
205views Formal Methods» more  IFM 2010»
13 years 5 months ago
Adding Change Impact Analysis to the Formal Verification of C Programs
Handling changes to programs and specifications efficiently is a particular challenge in formal software verification. Change impact analysis is an approach to this challenge where...
Serge Autexier, Christoph Lüth
CIBSE
2008
ACM
13 years 9 months ago
Using Refinement Checking as System Testing
Abstract. Software testing is an expensive and time-consuming activity; it is also error-prone due to human factors. But, it still is the most common effort used in the software in...
Cristiano Bertolini, Alexandre Mota