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» Testing implementations of transactional memory
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ACMMSP
2006
ACM
257views Hardware» more  ACMMSP 2006»
14 years 1 months ago
Memory models for open-nested transactions
Open nesting provides a loophole in the strict model of atomic transactions. Moss and Hosking suggested adapting open nesting for transactional memory, and Moss and a group at Sta...
Kunal Agrawal, Charles E. Leiserson, Jim Sukha
MICRO
2010
IEEE
242views Hardware» more  MICRO 2010»
13 years 5 months ago
ASF: AMD64 Extension for Lock-Free Data Structures and Transactional Memory
Advanced Synchronization Facility (ASF) is an AMD64 hardware extension for lock-free data structures and transactional memory. It provides a speculative region that atomically exec...
Jae-Woong Chung, Luke Yen, Stephan Diestelhorst, M...
OPODIS
2008
13 years 9 months ago
Ordering-Based Semantics for Software Transactional Memory
It has been widely suggested that memory transactions should behave as if they acquired and released a single global lock. Unfortunately, this behavior can be expensive to achieve...
Michael F. Spear, Luke Dalessandro, Virendra J. Ma...
ICPP
2008
IEEE
14 years 2 months ago
Scalable Techniques for Transparent Privatization in Software Transactional Memory
—We address the recently recognized privatization problem in software transactional memory (STM) runtimes, and introduce the notion of partially visible reads (PVRs) to heuristic...
Virendra J. Marathe, Michael F. Spear, Michael L. ...
CODES
2011
IEEE
12 years 7 months ago
SoC-TM: integrated HW/SW support for transactional memory programming on embedded MPSoCs
Two overriding concerns in the development of embedded MPSoCs are ease of programming and hardware complexity. In this paper we present SoC-TM, an integrated HW/SW solution for tr...
Cesare Ferri, Andrea Marongiu, Benjamin Lipton, R....