Sciweavers

507 search results - page 27 / 102
» Testing implementations of transactional memory
Sort
View
TVLSI
2008
89views more  TVLSI 2008»
13 years 9 months ago
Test Set Development for Cache Memory in Modern Microprocessors
Up to 53% of the time spent on testing current Intel microprocessors is needed to test on-chip caches, due to the high complexity of memory tests and to the large amount of transis...
Zaid Al-Ars, Said Hamdioui, Georgi Gaydadjiev, Sta...
CSFW
2002
IEEE
14 years 2 months ago
Security Protocol Design via Authentication Tests
We describe a protocol design process, and illustrate its use by creating ATSPECT, an Authentication Test-based Secure Protocol for Electronic Commerce Transactions. The design pr...
Joshua D. Guttman
POPL
2008
ACM
14 years 10 months ago
High-level small-step operational semantics for transactions
Software transactions have received significant attention as a way to simplify shared-memory concurrent programming, but insufficient focus has been given to the precise meaning o...
Katherine F. Moore, Dan Grossman
CAV
2010
Springer
179views Hardware» more  CAV 2010»
14 years 1 months ago
Generating Litmus Tests for Contrasting Memory Consistency Models
Well-defined memory consistency models are necessary for writing correct parallel software. Developing and understanding formal specifications of hardware memory models is a chal...
Sela Mador-Haim, Rajeev Alur, Milo M. K. Martin
IEEEPACT
2009
IEEE
13 years 7 months ago
Adaptive Locks: Combining Transactions and Locks for Efficient Concurrency
Transactional memory is being advanced as an alternative to traditional lock-based synchronization for concurrent programming. Transactional memory simplifies the programming mode...
Takayuki Usui, Reimer Behrends, Jacob Evans, Yanni...