507 search results - page 57 / 102 » Testing implementations of transactional memory |
VLSID
2004
IEEE
14 years 10 months ago
2004
IEEE
The detection of all open defects within 6T SRAM cells is always a challenge due to the significant test time requirements. This paper proposes a new design-for-test (DFT) techniq...
ATS
2001
IEEE
14 years 2 months ago
2001
IEEE
Testing and diagnosis are important issues in system-onchip (SOC) development, as more and more embedded cores are being integrated into the chips. In this paper we propose a buil...
TSE
2011
13 years 5 months ago
2011
—Conventional testing methods often fail to detect hidden flaws in complex embedded software such as device drivers or file systems. This deficiency incurs significant developmen...
JTRES
2010
ACM
13 years 10 months ago
2010
ACM
With traditional testing, the test case has no control over non-deterministic scheduling decisions, and thus errors dependent on scheduling are only found by pure chance. Java Pat...
DFT
2002
IEEE
14 years 3 months ago
2002
IEEE
1 The objective of this paper is to propose a new fault model suitable for test pattern generation for an FPGA configured to implement a given application. The paper demonstrates t...