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» Testing implementations of transactional memory
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IESS
2009
Springer
182views Hardware» more  IESS 2009»
13 years 5 months ago
Modeling Cache Effects at the Transaction Level
Abstract. Embedded system design complexities are growing exponentially. Demand has increased for modeling techniques that can provide both accurate measurements of delay and fast ...
Ardavan Pedram, David Craven, Andreas Gerstlauer
ICA3PP
2005
Springer
14 years 1 months ago
A Practical Comparison of Cluster Operating Systems Implementing Sequential and Transactional Consistency
Shared Memory is an interesting communication paradigm for SMP machines and clusters. Weak consistency models have been proposed to improve efficiency of shared memory applications...
Stefan Frenz, Renaud Lottiaux, Michael Schött...
CAL
2006
13 years 7 months ago
Subtleties of Transactional Memory Atomicity Semantics
Abstract-- Transactional memory has great potential for simplifying multithreaded programming by allowing programmers to specify regions of the program that must appear to execute ...
Milo M. K. Martin, Colin Blundell, E. Lewis
IISWC
2009
IEEE
14 years 2 months ago
On the (dis)similarity of transactional memory workloads
— Programming to exploit the resources in a multicore system remains a major obstacle for both computer and software engineers. Transactional memory offers an attractive alternat...
Clay Hughes, James Poe, Amer Qouneh, Tao Li
HPCA
2005
IEEE
14 years 8 months ago
Unbounded Transactional Memory
Hardware transactional memory should support unbounded transactions: transactions of arbitrary size and duration. We describe a hardware implementation of unbounded transactional ...
C. Scott Ananian, Krste Asanovic, Bradley C. Kuszm...