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ITC
2003
IEEE
136views Hardware» more  ITC 2003»
14 years 2 months ago
A BIST Solution for The Test of I/O Speed
A delay-locked loop (DLL) based built-in self test (BIST) circuit has been designed with a 0.18 µ m TSMC process (CM018) to test chip I/O speeds, specifically, the setup and hold...
Cheng Jia, Linda S. Milor
JSW
2007
107views more  JSW 2007»
13 years 9 months ago
Reducing Domain Level Scenarios to Test Component-based Software
—Higher-order black box software tests against independent end user domain requirements has become an issue of increasing importance with compositional reuse of software artifact...
Oliver Skroch, Klaus Turowski
ESANN
2004
13 years 11 months ago
Towards a Local Separation Performances Estimator Using Common ICA Contrast Functions?
Abstract. In most ICA algorithms, the separation performances are estimated through the evaluation of a contrast function , used in the update rule of elements of the unmixing matr...
Frédéric Vrins, Cédric Archam...
ACL
2009
13 years 7 months ago
The Chinese Aspect Generation Based on Aspect Selection Functions
This paper describes our system for generating Chinese aspect expressions. In the system, the semantics of different aspects is characterized by specific temporal and conceptual f...
Guowen Yang, John A. Bateman
DAC
1997
ACM
14 years 1 months ago
Hardware/Software Co-Simulation in a VHDL-Based Test Bench Approach
Novel test bench techniques are required to cope with a functional test complexity which is predicted to grow much more strongly than design complexity. Our test bench approach at...
Matthias Bauer, Wolfgang Ecker