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» The Architecture Tradeoff Analysis Method
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TC
2008
13 years 7 months ago
Analysis of Mask-Based Nanowire Decoders
Stochastically assembled nanoscale architectures have the potential to achieve device densities 100 times greater than today's CMOS. A key challenge facing nanotechnologies is...
Eric Rachlin, John E. Savage
AAAI
2011
12 years 7 months ago
A Functional Analysis of Historical Memory Retrieval Bias in the Word Sense Disambiguation Task
Effective access to knowledge within large declarative memory stores is one challenge in the development and understanding of long-living, generally intelligent agents. We focus o...
Nate Derbinsky, John E. Laird
DAC
2000
ACM
14 years 7 days ago
Fast power grid simulation
The decrease in feature size and added chip functionality in large sub-micron integrated circuits demand larger grids for power distribution. Since power grids are performance lim...
Sani R. Nassif, Joseph N. Kozhaya
DAC
2005
ACM
14 years 8 months ago
Power-aware placement
Lowering power is one of the greatest challenges facing the IC industry today. We present a power-aware placement method that simultaneously performs (1) activity-based register c...
Yongseok Cheon, Pei-Hsin Ho, Andrew B. Kahng, Sher...
INFOCOM
2007
IEEE
14 years 2 months ago
Residual-Based Measurement of Peer and Link Lifetimes in Gnutella Networks
—Existing methods of measuring lifetimes in P2P systems usually rely on the so-called Create-Based Method (CBM) [16], which divides a given observation window into two halves and...
Xiaoming Wang, Zhongmei Yao, Dmitri Loguinov