217 search results - page 15 / 44 » The Block-Based Trace Cache |
CGO
2003
IEEE
13 years 11 months ago
2003
IEEE
In this paper, we present METRIC, an environment for determining memory inefficiencies by examining data traces. METRIC is designed to alter the performance behavior of applicatio...
RTCSA
1999
IEEE
14 years 3 days ago
1999
IEEE
In this paper we present a technique for Worst-Case Execution Time WCET analysis for pipelined processors. Our technique uses a standard simulator instead of special-purpose pipel...
SIGMETRICS
1994
ACM
13 years 12 months ago
1994
ACM
Shade is an instruction-set simulator and custom trace generator. Application programs are executed and traced under the control of a user-supplied trace analyzer. To reduce commu...
MONET
2002
13 years 7 months ago
2002
In this paper we discuss the performance of a document distribution model that interconnects Web caches through a satellite channel. During recent years Web caching has emerged as...
ICPP
2002
IEEE
14 years 24 days ago
2002
IEEE
Conventional instruction fetch mechanisms fetch contiguous blocks of instructions in each cycle. They are difficult to scale since taken branches make it hard to increase the siz...