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» The Case for Better Throughput Estimation
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DAC
2012
ACM
11 years 10 months ago
A metric for layout-friendly microarchitecture optimization in high-level synthesis
In this work we address the problem of managing interconnect timing in high-level synthesis by generating a layoutfriendly microarchitecture. A metric called spreading score is pr...
Jason Cong, Bin Liu
AUTOMATICA
2006
104views more  AUTOMATICA 2006»
13 years 7 months ago
Identification of multi-input systems: variance analysis and input design issues
This paper examines the identification of multi-input systems. Motivated by an experiment design problem (should one excite the various inputs simultaneously or separately), we ex...
Michel Gevers, Ljubisa Miskovic, Dominique Bonvin,...
CVPR
2008
IEEE
14 years 2 months ago
Retinal image registration from 2D to 3D
We propose a 2D registration method for multi-modal image sequences of the retinal fundus, and a 3D metric reconstruction of near planar surface from multiple views. There are two...
Yuping Lin, Gérard G. Medioni
GLOBECOM
2007
IEEE
14 years 1 months ago
A Technique to Enhance Localization in the Presence of NLOS Errors
— In a wireless network (WN), the wireless devices generally localize themselves with the help of anchors that are pre-deployed in the network. Some of the techniques commonly us...
Satyajayant Misra, Weiyi Zhang, Guoliang Xue
DAC
2012
ACM
11 years 10 months ago
WCET-centric partial instruction cache locking
Caches play an important role in embedded systems by bridging the performance gap between high speed processors and slow memory. At the same time, caches introduce imprecision in ...
Huping Ding, Yun Liang, Tulika Mitra