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» The Complexity of Planarity Testing
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234
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GIS
2006
ACM
16 years 5 months ago
Optimal BSPs and rectilinear cartograms
A cartogram is a thematic map that visualizes statistical data about a set of regions like countries, states or provinces. The size of a region in a cartogram corresponds to a par...
Mark de Berg, Elena Mumford, Bettina Speckmann
DAC
2009
ACM
16 years 5 months ago
Interconnection fabric design for tracing signals in post-silicon validation
Post-silicon validation has become an essential step in the design flow of today's complex integrated circuits. One effective technique that provides real-time visibility to ...
Xiao Liu, Qiang Xu
DAC
2009
ACM
16 years 5 months ago
Computing bounds for fault tolerance using formal techniques
Continuously shrinking feature sizes result in an increasing susceptibility of circuits to transient faults, e.g. due to environmental radiation. Approaches to implement fault tol...
André Sülflow, Görschwin Fey, Rol...
DAC
2009
ACM
16 years 5 months ago
Decoding nanowire arrays fabricated with the multi-spacer patterning technique
Silicon nanowires are a promising solution to address the increasing challenges of fabrication and design at the future nodes of the Complementary Metal-Oxide-Semiconductor (CMOS)...
M. Haykel Ben Jamaa, Yusuf Leblebici, Giovanni De ...
146
Voted
DAC
2000
ACM
16 years 5 months ago
Power minimization using control generated clocks
In this paper we describe an area efficient power minimization scheme "Control Generated ClockingI` that saves significant amounts of power in datapath registers and clock dr...
M. Srikanth Rao, S. K. Nandy