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» The Design and Implementation of a Certifying Compiler
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FCCM
2007
IEEE
108views VLSI» more  FCCM 2007»
14 years 3 months ago
Configurable Transactional Memory
Programming efficiency of heterogeneous concurrent systems is limited by the use of lock-based synchronization mechanisms. Transactional memories can greatly improve the programmi...
Christoforos Kachris, Chidamber Kulkarni
GLVLSI
2006
IEEE
126views VLSI» more  GLVLSI 2006»
14 years 2 months ago
Hardware/software partitioning of operating systems: a behavioral synthesis approach
In this paper we propose a hardware real time operating system (HW-RTOS) solution that makes use of a dedicated hardware in order to replace the standard support provided by the P...
Sathish Chandra, Francesco Regazzoni, Marcello Laj...
IPPS
2006
IEEE
14 years 2 months ago
Hierarchically tiled arrays for parallelism and locality
Parallel programming is facilitated by constructs which, unlike the widely used SPMD paradigm, provide programmers with a global view of the code and data structures. These constr...
Jia Guo, Ganesh Bikshandi, Daniel Hoeflinger, Gheo...
ICICS
2001
Springer
14 years 1 months ago
Enforcing Obligation with Security Monitors
With the ubiquitous deployment of large scale networks more and more complex human interactions are supported by computer applications. This poses new challenges on the expressive...
Carlos Ribeiro, Andre Zuquete, Paulo Ferreira
EMSOFT
2006
Springer
14 years 12 days ago
A hierarchical coordination language for interacting real-time tasks
We designed and implemented a new programming language called Hierarchical Timing Language (HTL) for hard realtime systems. Critical timing constraints are specified within the la...
Arkadeb Ghosal, Alberto L. Sangiovanni-Vincentelli...