867 search results - page 123 / 174 » The Design and Performance of a Conflict-Avoiding Cache |
160
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ISPAN
2008
IEEE
16 years 10 days ago
2008
IEEE
Data prefetching has been considered an effective way to mask data access latency caused by cache misses and to bridge the performance gap between processor and memory. With hardw...
155
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SPDP
1993
IEEE
15 years 10 months ago
1993
IEEE
Meerkat is a distributed memory multicomputer architecture that scales to hundreds of processors. Meerkat uses a two dimensional passive backplane to connect nodes composed of pro...
179
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LCTRTS
2009
Springer
16 years 22 days ago
2009
Springer
Dynamic binary translation (DBT) can provide security, virtualization, resource management and other desirable services to embedded systems. Although DBT has many benefits, its r...
160
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HIPEAC
2007
Springer
16 years 3 days ago
2007
Springer
A critical component in the design of secure processors is memory encryption which provides protection for the privacy of code and data stored in off-chip memory. The overhead of ...
190
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MDM
2005
Springer
15 years 11 months ago
2005
Springer
Data access prediction has been proposed as a mechanism to overcome latency lag, and more recently as a means of conserving energy in mobile systems. We present a fully adaptive p...