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» The Design and Performance of a Conflict-Avoiding Cache
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ISLPED
2005
ACM
98views Hardware» more  ISLPED 2005»
15 years 11 months ago
Synonymous address compaction for energy reduction in data TLB
Modern processors can issue and execute multiple instructions per cycle, often performing multiple memory operations simultaneously. To reduce stalls due to resource conflicts, m...
Chinnakrishnan S. Ballapuram, Hsien-Hsin S. Lee, M...
VLDB
2004
ACM
143views Database» more  VLDB 2004»
15 years 11 months ago
Clotho: Decoupling memory page layout from storage organization
As database application performance depends on the utilization of the memory hierarchy, smart data placement plays a central role in increasing locality and in improving memory ut...
Minglong Shao, Jiri Schindler, Steven W. Schlosser...
PVLDB
2010
164views more  PVLDB 2010»
15 years 4 months ago
FlashStore: High Throughput Persistent Key-Value Store
We present FlashStore, a high throughput persistent keyvalue store, that uses flash memory as a non-volatile cache between RAM and hard disk. FlashStore is designed to store the ...
Biplob Debnath, Sudipta Sengupta, Jin Li
ASPLOS
2011
ACM
14 years 9 months ago
Hardware acceleration of transactional memory on commodity systems
The adoption of transactional memory is hindered by the high overhead of software transactional memory and the intrusive design changes required by previously proposed TM hardware...
Jared Casper, Tayo Oguntebi, Sungpack Hong, Nathan...
237
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ASPLOS
2012
ACM
14 years 1 months ago
DejaVu: accelerating resource allocation in virtualized environments
Effective resource management of virtualized environments is a challenging task. State-of-the-art management systems either rely on analytical models or evaluate resource allocati...
Nedeljko Vasic, Dejan M. Novakovic, Svetozar Miuci...