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» The Design and Performance of a Conflict-Avoiding Cache
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ICS
2007
Tsinghua U.
15 years 12 months ago
An L2-miss-driven early register deallocation for SMT processors
The register file is one of the most critical datapath components limiting the number of threads that can be supported on a Simultaneous Multithreading (SMT) processor. To allow t...
Joseph J. Sharkey, Dmitry V. Ponomarev
VLDB
2005
ACM
180views Database» more  VLDB 2005»
15 years 11 months ago
Cache-conscious Frequent Pattern Mining on a Modern Processor
In this paper, we examine the performance of frequent pattern mining algorithms on a modern processor. A detailed performance study reveals that even the best frequent pattern min...
Amol Ghoting, Gregory Buehrer, Srinivasan Parthasa...
CCS
2005
ACM
15 years 11 months ago
CPOL: high-performance policy evaluation
Policy enforcement is an integral part of many applications. Policies are often used to control access to sensitive information. Current policy specification languages give users ...
Kevin Borders, Xin Zhao, Atul Prakash
WWW
2007
ACM
16 years 6 months ago
Querying and maintaining a compact XML storage
As XML database sizes grow, the amount of space used for storing the data and auxiliary data structures becomes a major factor in query and update performance. This paper presents...
Raymond K. Wong, Franky Lam, William M. Shui
WWW
2010
ACM
16 years 25 days ago
Autonomous resource provisioning for multi-service web applications
Dynamic resource provisioning aims at maintaining the endto-end response time of a web application within a predefined SLA. Although the topic has been well studied for monolithi...
Dejun Jiang, Guillaume Pierre, Chi-Hung Chi