Sciweavers

867 search results - page 92 / 174
» The Design and Performance of a Conflict-Avoiding Cache
Sort
View
LCTRTS
2007
Springer
16 years 6 days ago
Integrated CPU and l2 cache voltage scaling using machine learning
Embedded systems serve an emerging and diverse set of applications. As a result, more computational and storage capabilities are added to accommodate ever more demanding applicati...
Nevine AbouGhazaleh, Alexandre Ferreira, Cosmin Ru...
ICDE
2006
IEEE
144views Database» more  ICDE 2006»
16 years 7 months ago
Super-Scalar RAM-CPU Cache Compression
High-performance data-intensive query processing tasks like OLAP, data mining or scientific data analysis can be severely I/O bound, even when high-end RAID storage systems are us...
Marcin Zukowski, Niels Nes, Peter A. Boncz, S&aacu...
159
Voted
MOBIHOC
2003
ACM
16 years 5 months ago
Energy-efficient caching strategies in ad hoc wireless networks
In this paper, we address the problem of energy-conscious cache placement in wireless ad hoc networks. We consider a network comprising a server with an interface to the wired net...
Pavan Nuggehalli, Vikram Srinivasan, Carla-Fabiana...
ICDCS
2005
IEEE
15 years 11 months ago
DISC: Dynamic Interleaved Segment Caching for Interactive Streaming
Streaming media objects have become widely used on the Internet, and the demand of interactive requests to these objects has increased dramatically. Typical interactive requests i...
Lei Guo, Songqing Chen, Zhen Xiao, Xiaodong Zhang
167
Voted
SC
2009
ACM
16 years 26 days ago
A case for integrated processor-cache partitioning in chip multiprocessors
Existing cache partitioning schemes are designed in a manner oblivious to the implicit processor partitioning enforced by the operating system. This paper examines an operating sy...
Shekhar Srikantaiah, Reetuparna Das, Asit K. Mishr...