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» The Design of the POSTGRES Storage System
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SIGMETRICS
2009
ACM
157views Hardware» more  SIGMETRICS 2009»
14 years 2 months ago
Delay tolerant bulk data transfers on the internet
Many emerging scientific and industrial applications require transferring multiple Tbytes of data on a daily basis. Examples include pushing scientific data from particle accele...
Nikolaos Laoutaris, Georgios Smaragdakis, Pablo Ro...
ISCA
2008
IEEE
132views Hardware» more  ISCA 2008»
14 years 2 months ago
Online Estimation of Architectural Vulnerability Factor for Soft Errors
As CMOS technology scales and more transistors are packed on to the same chip, soft error reliability has become an increasingly important design issue for processors. Prior resea...
Xiaodong Li, Sarita V. Adve, Pradip Bose, Jude A. ...
ICPP
2007
IEEE
14 years 2 months ago
RECN-IQ: A Cost-Effective Input-Queued Switch Architecture with Congestion Management
As the number of computing and storage nodes keeps increasing, the interconnection network is becoming a key element of many computing and communication systems, where the overall...
Gaspar Mora, Pedro Javier García, Jose Flic...
ISCA
2007
IEEE
198views Hardware» more  ISCA 2007»
14 years 2 months ago
Making the fast case common and the uncommon case simple in unbounded transactional memory
Hardware transactional memory has great potential to simplify the creation of correct and efficient multithreaded programs, allowing programmers to exploit more effectively the s...
Colin Blundell, Joe Devietti, E. Christopher Lewis...
CIKM
2007
Springer
14 years 2 months ago
RDF data exploration and visualization
We present Paged Graph Visualization (PGV), a new semiautonomous tool for RDF data exploration and visualization. PGV consists of two main components: a) the “PGV explorer” an...
Leonidas Deligiannidis, Krys Kochut, Amit P. Sheth