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IPPS
1999
IEEE
14 years 3 months ago
Scalable Hardware-Algorithms for Binary Prefix Sums
Abstract. Themain contributionof thiswork isto propose a numberof broadcastefficient VLSI architectures for computing the sum and the prefix sums of a w k-bit, k 2, binary sequenc...
Rong Lin, Koji Nakano, Stephan Olariu, Maria Crist...
HPDC
1998
IEEE
14 years 3 months ago
Efficient Coupling of Parallel Applications Using PAWS
PAWS (Parallel Application WorkSpace) is a software infrastructure for use in connecting separate parallel applications within a component-like model. A central PAWS Controller co...
Peter H. Beckman, Patricia K. Fasel, William F. Hu...
IEEEPACT
1998
IEEE
14 years 3 months ago
A Matrix-Based Approach to the Global Locality Optimization Problem
Global locality analysis is a technique for improving the cache performance of a sequence of loop nests through a combination of loop and data layout optimizations. Pure loop tran...
Mahmut T. Kandemir, Alok N. Choudhary, J. Ramanuja...
IPPS
1998
IEEE
14 years 3 months ago
Code Transformations for Low Power Caching in Embedded Multimedia Processors
In this paper, we present several novel strategies to improve software controlled cache utilization, so as to achieve lower power requirements for multi-media and signal processin...
Chidamber Kulkarni, Francky Catthoor, Hugo De Man
ICPP
1996
IEEE
14 years 3 months ago
Restructuring Programs for High-Speed Computers with Polaris
The ability to automatically parallelize standard programming languages results in program portability across a wide range of machine architectures. It is the goal of the Polaris ...
William Blume, Rudolf Eigenmann, Keith Faigin, Joh...