Sciweavers

100 search results - page 10 / 20
» The Effect of Instruction Set Complexity on Program Size and...
Sort
View
LCTRTS
2005
Springer
14 years 6 days ago
Cache aware optimization of stream programs
Effective use of the memory hierarchy is critical for achieving high performance on embedded systems. We focus on the class of streaming applications, which is increasingly preval...
Janis Sermulins, William Thies, Rodric M. Rabbah, ...
ICDCS
2012
IEEE
11 years 9 months ago
Scalable Name Lookup in NDN Using Effective Name Component Encoding
—Name-based route lookup is a key function for Named Data Networking (NDN). The NDN names are hierarchical and have variable and unbounded lengths, which are much longer than IPv...
Yi Wang, Keqiang He, Huichen Dai, Wei Meng, Junche...
TPDS
2008
89views more  TPDS 2008»
13 years 6 months ago
Power/Performance/Thermal Design-Space Exploration for Multicore Architectures
Multicore architectures have been ruling the recent microprocessor design trend. This is due to different reasons: better performance, thread-level parallelism bounds in modern app...
Matteo Monchiero, Ramon Canal, Antonio Gonzá...
FPGA
2007
ACM
150views FPGA» more  FPGA 2007»
14 years 26 days ago
FPGA-friendly code compression for horizontal microcoded custom IPs
Shrinking time-to-market and high demand for productivity has driven traditional hardware designers to use design methodologies that start from high-level languages. However, meet...
Bita Gorjiara, Daniel Gajski
BCS
2008
13 years 8 months ago
A Customisable Multiprocessor for Application-Optimised Inductive Logic Programming
This paper describes a customisable processor designed to accelerate execution of inductive logic programming, targeting advanced field-programmable gate array (FPGA) technology. ...
Andreas Fidjeland, Wayne Luk, Stephen Muggleton