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» The Energy Efficiency of IRAM Architectures
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ASAP
2006
IEEE
130views Hardware» more  ASAP 2006»
14 years 1 months ago
Cross Layer Design to Multi-thread a Data-Pipelining Application on a Multi-processor on Chip
Data-Pipelining is a widely used model to represent streaming applications. Incremental decomposition and optimization of a data-pipelining application onto a multi-processor plat...
Bo-Cheng Charles Lai, Patrick Schaumont, Wei Qin, ...
DAC
2010
ACM
13 years 11 months ago
A probabilistic and energy-efficient scheduling approach for online application in real-time systems
This work considers the problem of minimizing the power consumption for real-time scheduling on processors with discrete operating modes. We provide a model for determining the ex...
Thorsten Zitterell, Christoph Scholl
DAC
2007
ACM
14 years 8 months ago
Dynamic Power Management with Hybrid Power Sources
DPM (Dynamic Power Management) is an effective technique for reducing the energy consumption of embedded systems that is based on migrating to a low power state when possible. Whi...
Jianli Zhuo, Chaitali Chakrabarti, Kyungsoo Lee, N...
MOBIHOC
2008
ACM
14 years 7 months ago
Collaborative query processing among heterogeneous sensor networks
Demands on better interacting with physical world require an effective and comprehensive collaboration mechanism among multiple heterogeneous sensor networks. Previous works mainl...
Yuan He, Mo Li, Yunhao Liu
ISHPC
1999
Springer
13 years 12 months ago
Instruction-Level Microprocessor Modeling of Scientific Applications
Superscalar microprocessor efficiency is generally not as high as anticipated. In fact, sustained utilization below thirty percent of peak is not uncommon, even for fully optimized...
Kirk W. Cameron, Yong Luo, James Scharzmeier