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EUROSYS
2007
ACM
15 years 6 months ago
Enabling scalability and performance in a large scale CMP environment
Hardware trends suggest that large-scale CMP architectures, with tens to hundreds of processing cores on a single piece of silicon, are iminent within the next decade. While exist...
Bratin Saha, Ali-Reza Adl-Tabatabai, Anwar M. Ghul...
LCTRTS
2004
Springer
15 years 10 months ago
Asynchronous software thread integration for efficient software
Existing software thread integration (STI) methods provide synchronous thread progress within integrated functions. For the remaining, non-integrated portions of the secondary (or...
Nagendra J. Kumar, Siddhartha Shivshankar, Alexand...
SERP
2003
15 years 6 months ago
Software Requirements Specification of a University Class Scheduler
The University Class Scheduler (UCS) presented in this paper is a novel scheduling tool intended to be used by universities to schedule classes into classrooms. In essence, UCS al...
Deanna M. Needell, Jeff A. Stuart, Tamara C. Thiel...
FPL
2010
Springer
146views Hardware» more  FPL 2010»
15 years 2 months ago
Software Managed Distributed Memories in MPPAs
When utilizing reconfigurable hardware there are many applications that will require more memory than is available in a single hardware block. While FPGAs have tools and mechanisms...
Robin Panda, Jimmy Xu, Scott Hauck
CCECE
2006
IEEE
15 years 10 months ago
A Hardware/Software Co-Design for RSVP-TE MPLS
This paper presents a hardware/software co-design for Multi Protocol Label Switching (MPLS) using RSVP-TE as a signaling protocol. MPLS is the protocol framework on which the atte...
Raymond Peterkin, Dan Ionescu