237 search results - page 23 / 48 » The Garp Architecture and C Compiler |
LCPC
2007
Springer
14 years 4 months ago
2007
Springer
Massively parallel SIMD array architectures are making their way into embedded processors. In these architectures, a number of identical processing elements having small private st...
ML
2008
ACM
13 years 9 months ago
2008
ACM
The importance of providing a mechanism to call C functions from high-level languages has been understood for many years and, these days, almost all statically-typed high-level-la...
POPL
2009
ACM
14 years 4 months ago
2009
ACM
We develop a rigorous semantics for Power and ARM multiprocessor programs, including their relaxed memory model and the behaviour of reasonable fragments of their instruction sets...
VLSID
2007
IEEE
14 years 10 months ago
2007
IEEE
We present AHIR, an intermediate representation (IR), that acts as a transition layer between software compilation and hardware synthesis. Such a transition layer is intended to t...
IEEEPACT
2006
IEEE
14 years 3 months ago
2006
IEEE
On machines with high-performance processors, the memory system continues to be a performance bottleneck. Compilers insert prefetch operations and reorder data accesses to improve...