Sciweavers

237 search results - page 35 / 48
» The Garp Architecture and C Compiler
Sort
View
ICPP
1996
IEEE
14 years 2 months ago
Portable Parallel Programming Languages
In this workshop session, three speakers present their viewpoints and contributions to the topic of portable parallel programming languages. They are Dennis Gannon from Indiana Un...
Rudolf Eigenmann
FPL
2009
Springer
132views Hardware» more  FPL 2009»
14 years 1 months ago
Binary Synthesis with multiple memory banks targeting array references
High-Level Synthesis (HLS) is the field of transforming a high-level programming language, such as C, into a register transfer level(RTL) description of the design. In HLS, Binary...
Yosi Ben-Asher, Nadav Rotem
CODES
2009
IEEE
14 years 1 months ago
TotalProf: a fast and accurate retargetable source code profiler
Profilers play an important role in software/hardware design, optimization, and verification. Various approaches have been proposed to implement profilers. The most widespread app...
Lei Gao, Jia Huang, Jianjiang Ceng, Rainer Leupers...
VEE
2005
ACM
143views Virtualization» more  VEE 2005»
14 years 3 months ago
Virtual machine showdown: stack versus registers
Virtual machines (VMs) are commonly used to distribute programs in an architecture-neutral format, which can easily be interpreted or compiled. A long-running question in the desi...
Yunhe Shi, David Gregg, Andrew Beatty, M. Anton Er...
APCSAC
2005
IEEE
14 years 3 months ago
An Integrated Partitioning and Scheduling Based Branch Decoupling
Conditional branch induced control hazards cause significant performance loss in modern out-of-order superscalar processors. Dynamic branch prediction techniques help alleviate th...
Pramod Ramarao, Akhilesh Tyagi