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GLVLSI
2011
IEEE
344views VLSI» more  GLVLSI 2011»
13 years 1 months ago
Circuit design of a dual-versioning L1 data cache for optimistic concurrency
This paper proposes a novel L1 data cache design with dualversioning SRAM cells (dvSRAM) for chip multi-processors (CMP) that implement optimistic concurrency proposals. In this n...
Azam Seyedi, Adrià Armejach, Adrián ...
ISCA
2011
IEEE
269views Hardware» more  ISCA 2011»
13 years 1 months ago
Crafting a usable microkernel, processor, and I/O system with strict and provable information flow security
High assurance systems used in avionics, medical implants, and cryptographic devices often rely on a small trusted base of hardware and software to manage the rest of the system. ...
Mohit Tiwari, Jason Oberg, Xun Li 0001, Jonathan V...
EUROSYS
2011
ACM
13 years 1 months ago
Finding complex concurrency bugs in large multi-threaded applications
Parallel software is increasingly necessary to take advantage of multi-core architectures, but it is also prone to concurrency bugs which are particularly hard to avoid, find, an...
Pedro Fonseca, Cheng Li, Rodrigo Rodrigues
EUROSYS
2011
ACM
13 years 1 months ago
Keypad: an auditing file system for theft-prone devices
This paper presents Keypad, an auditing file system for theftprone devices, such as laptops and USB sticks. Keypad provides two important properties. First, Keypad supports fine...
Roxana Geambasu, John P. John, Steven D. Gribble, ...
ICSE
2011
IEEE-ACM
13 years 1 months ago
JavAdaptor: unrestricted dynamic software updates for Java
Dynamic software updates (DSU) are one of the top-most features requested by developers and users. As a result, DSU is already standard in many dynamic programming languages. But,...
Mario Pukall, Alexander Grebhahn, Reimar Schrö...
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