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ISPD
2003
ACM
88views Hardware» more  ISPD 2003»
15 years 9 months ago
Porosity aware buffered steiner tree construction
— In order to achieve timing closure on increasingly complex IC designs, buffer insertion needs to be performed on thousands of nets within an integrated physical synthesis syste...
Charles J. Alpert, Gopal Gandham, Milos Hrkic, Jia...
DATE
2010
IEEE
178views Hardware» more  DATE 2010»
15 years 9 months ago
Circuit propagation delay estimation through multivariate regression-based modeling under spatio-temporal variability
—With every process generation, the problem of variability in physical parameters and environmental conditions poses a great challenge to the design of fast and reliable circuits...
Shrikanth Ganapathy, Ramon Canal, Antonio Gonz&aac...
ICDCS
2002
IEEE
15 years 9 months ago
Scheduling Real-Time Data Items In Multiple Channels And Multiple Receivers Environments
In the real-time environments, information is disseminated to clients with timing constraint. In this paper, we focus on the real time data scheduling problem in multiple broadcas...
Guanling Lee, Yi-Ning Pan, Arbee L. P. Chen
LCN
2002
IEEE
15 years 9 months ago
Optimization of AP Placement and Channel Assignment in Wireless LANs
—The design of a wireless local area network (WLAN) has an important issue of determining the optimal placement of access points (APs) and assignment of channels to them. WLAN se...
Youngseok Lee, Kyoungae Kim, Yanghee Choi
SIGECOM
2010
ACM
184views ECommerce» more  SIGECOM 2010»
15 years 9 months ago
Computing pure strategy nash equilibria in compact symmetric games
We analyze the complexity of computing pure strategy Nash equilibria (PSNE) in symmetric games with a fixed number of actions. We restrict ourselves to “compact” representati...
Christopher Thomas Ryan, Albert Xin Jiang, Kevin L...