2424 search results - page 115 / 485 » The High Level Architecture for Simulations |
173
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SDL
2003
15 years 7 months ago
2003
Network on Chip (NoC) is a new paradigm for designing large and complex systems on chips (SoCs). In this paradigm, a packet switched network is provided for on-chip communication. ...
150
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ISCAS
2005
IEEE
15 years 11 months ago
2005
IEEE
—Systems on chip are more and more heterogeneous and include software, analog/RF and digital hardware, and non-electronic components such as sensors or actuators. The design and ...
134
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DAC
1999
ACM
15 years 10 months ago
1999
ACM
This paper describes a two-state methodology for register transfer level (RTL) logic simulation in which the use of the Xstate is completely eliminated inside ASIC designs. Exampl...
132
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WSC
2000
15 years 7 months ago
2000
This paper describes how discrete-event simulation enhanced a traditional process design effort for a new media company in pre-launch mode. Because the company's business mod...
176
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SIMULATION
2010
15 years 19 days ago
2010
We introduce and describe a novel network simulation tool called NeSSi (Network Security Simulator). NeSSi incorporates a variety of features relevant to network security distingu...