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DAC
2012
ACM
11 years 11 months ago
2012
ACM
Unknown values (Xs) may exist in a design due to uninitialized registers or blocks that are powered down. Due to X-pessimism in gate-level logic simulation, such Xs cannot be hand...
GPC
2009
Springer
13 years 6 months ago
2009
Springer
In this paper, we propose an extension to the I/O device architecture, as recommended in the PCI-SIG IOV specification, for virtualizing network I/O devices. The aim is to enable ...
ASAP
1996
IEEE
14 years 1 months ago
1996
IEEE
A datapath synthesis system (DPSS) for a bus-based wavefront array architecture, called rDPA (reconfigurable datapath architecture), is presented. An internal data bus to the arra...
DAC
2002
ACM
14 years 9 months ago
2002
ACM
In this paper, a new timing generation method is proposed for the performance analysis of embedded software. The time stamp generation of I/O accesses is crucial to performance es...
WSC
2007
13 years 11 months ago
2007
Using models in different contexts poses major integration challenges, ranging from technical to conceptual levels. Independently of each other developed model components cannot b...