Sciweavers

2424 search results - page 141 / 485
» The High Level Architecture for Simulations
Sort
View
GLOBECOM
2006
IEEE
14 years 3 months ago
Interleaved Multistage Switching Fabrics for Scalable High Performance Routers
As the Internet grows exponentially, scalable high performance routers and switches on backbone are required to provide a large number of ports, higher throughput, lower delay late...
Rongsen He, José G. Delgado-Frias
TPDS
2008
140views more  TPDS 2008»
13 years 8 months ago
High-Performance Resource Allocation and Request Redirection Algorithms for Web Clusters
Abstract-- With increasing richness in features such as personalization of content, web applications are becoming more complex and hence compute intensive. Traditional approaches t...
Supranamaya Ranjan, Edward W. Knightly
WSCG
2003
177views more  WSCG 2003»
13 years 10 months ago
An Architecture for Hierarchical Collision Detection
We present novel algorithms for efficient hierarchical collision detection and propose a hardware architecture for a single-chip accelerator. We use a hierarchy of bounding volum...
Gabriel Zachmann, Günter Knittel
PPOPP
2003
ACM
14 years 2 months ago
Programming the FlexRAM parallel intelligent memory system
In an intelligent memory architecture, the main memory of a computer is enhanced with many simple processors. The result is a highly-parallel, heterogeneous machine that is able t...
Basilio B. Fraguela, Jose Renau, Paul Feautrier, D...
CORR
2008
Springer
102views Education» more  CORR 2008»
13 years 9 months ago
Architecture for Integrated Mems Resonators Quality Factor Measurement
In this paper, an architecture designed for electrical measurement of the quality factor of MEMS resonators is proposed. An estimation of the measurement performance is made using...
Hervé Mathias, Fabien Parrain, Jean-Paul Gi...