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» The High Level Architecture for Simulations
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DAC
2005
ACM
16 years 7 months ago
Designing logic circuits for probabilistic computation in the presence of noise
As Si CMOS devices are scaled down into the nanoscale regime, current computer architecture approaches are reaching their practical limits. Future nano-architectures will confront...
Kundan Nepal, R. Iris Bahar, Joseph L. Mundy, Will...
FPGA
2000
ACM
161views FPGA» more  FPGA 2000»
15 years 9 months ago
The effect of LUT and cluster size on deep-submicron FPGA performance and density
In this paper we revisit the FPGA architectural issue of the effect of logic block functionality on FPGA performance and density. In particular, in the context of lookup table, cl...
Elias Ahmed, Jonathan Rose
IOPADS
1996
100views more  IOPADS 1996»
15 years 7 months ago
ENWRICH a Compute-Processor Write Caching Scheme for Parallel File Systems
Many parallel scientific applications need high-performance I/O. Unfortunately, end-to-end parallel-I/O performance has not been able to keep up with substantial improvements in p...
Apratim Purakayastha, Carla Schlatter Ellis, David...
BMCBI
2010
140views more  BMCBI 2010»
15 years 6 months ago
Quantification and deconvolution of asymmetric LC-MS peaks using the bi-Gaussian mixture model and statistical model selection
Background: Liquid chromatography-mass spectrometry (LC-MS) is one of the major techniques for the quantification of metabolites in complex biological samples. Peak modeling is on...
Tianwei Yu, Hesen Peng
ADHOC
2010
138views more  ADHOC 2010»
15 years 6 months ago
On the feasibility of UMTS-based Traffic Information Systems
Intelligent Transportation Systems (ITS) are a hot topic in the communications society. Currently, research is primarily focusing on setting up Vehicular Ad Hoc Networks (VANETs) ...
Christoph Sommer, Armin Schmidt, Yi Chen, Reinhard...