2424 search results - page 34 / 485 » The High Level Architecture for Simulations |
WSC
2008
13 years 11 months ago
2008
Simulation techniques can provide a resource-driven schedule and answer many hypothetical scenarios before project execution to improve on conventional project management software...
CCGRID
2005
IEEE
14 years 2 months ago
2005
IEEE
In this article we present the design choices and the evaluation of a batch scheduler for large clusters, named OAR. This batch scheduler is based upon an original design that emp...
CORR
2006
Springer
13 years 8 months ago
2006
Springer
We introduce a new approach to take into account the memory architecture and the memory mapping in the High- Level Synthesis of Real-Time embedded systems. We formalize the memory...
DAC
2001
ACM
14 years 9 months ago
2001
ACM
The quality of synthesis results for most high level synthesis approaches is strongly a ected by the choice of control ow through conditions and loops in the input description. In...
ERSA
2006
13 years 10 months ago
2006
In this paper we first outline and discuss the issues of currently accepted computational models for hybrid CPU/FPGA systems. Then, we discuss the need for researchers to develop ...