2424 search results - page 67 / 485 » The High Level Architecture for Simulations |
WSCG
2004
13 years 10 months ago
2004
Cloth simulation is a highly intensive processor task. Higher details are often traded or sacrificed for speed in order to maintain the simulation at reasonable rates. This articl...
MASCOTS
2004
13 years 10 months ago
2004
A number of new network storage architectures have emerged recently that provide shared, adaptable and high-performance storage systems for dataintensive applications. Three commo...
MSS
1995
IEEE
14 years 9 days ago
1995
IEEE
This paper will attempt to examine the industry requirements for shared network data storage and sustained high speed (10’s to 100’s to thousands of megabytes per second) netw...
ISPASS
2006
IEEE
14 years 2 months ago
2006
IEEE
The present work presents a cycle-level execution-driven simulator for modern GPU architectures. We discuss the simulation model used for our GPU simulator, based in the concept o...
DATE
1999
IEEE
14 years 1 months ago
1999
IEEE
Estimating switching activity is a crucial step in optimizing circuits for low power. In this paper, a fast gate level switching activity estimator for combinational circuits will...