2424 search results - page 95 / 485 » The High Level Architecture for Simulations |
SP
2010
IEEE
13 years 7 months ago
2010
IEEE
Node level heterogeneous architectures have become attractive during the last decade for several reasons: compared to traditional symmetric CPUs, they offer high peak performance a...
IPPS
2005
IEEE
14 years 2 months ago
2005
IEEE
Computational biology research is now faced with the burgeoning number of genome data. The rigorous postprocessing of this data requires an increased role for high performance com...
ISVLSI
2007
IEEE
14 years 3 months ago
2007
IEEE
— We present a performance analysis of CoDeL, a highly efficient automated clock gating platform for rapidly developing power efficient hardware architectures. It automatically...
ISCC
2006
IEEE
14 years 2 months ago
2006
IEEE
Abstract— Today data sources are pervasive and their number is growing tremendously. Current tools are not prepared to exploit this unprecedented amount of information and to cop...
ISCA
2005
IEEE
14 years 2 months ago
2005
IEEE
Recent I/O technologies such as PCI-Express and 10Gb Ethernet enable unprecedented levels of I/O bandwidths in mainstream platforms. However, in traditional architectures, memory ...