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SIGARCH
2008
107views more  SIGARCH 2008»
13 years 7 months ago
A lightweight streaming layer for multicore execution
As multicore architectures gain widespread use, it becomes increasingly important to be able to harness their additional processing power to achieve higher performance. However, e...
David Zhang, Qiuyuan J. Li, Rodric Rabbah, Saman A...
VLSID
2003
IEEE
183views VLSI» more  VLSID 2003»
14 years 8 months ago
Design of a 2D DCT/IDCT application specific VLIW processor supporting scaled and sub-sampled blocks
We present an innovative design of an accurate, 2D DCT IDCT processor, which handles scaled and sub-sampled input blocks efficiently. In the IDCT mode, the latency of the processo...
Rohini Krishnan, Om Prakash Gangwal, Jos T. J. van...
GIS
2006
ACM
14 years 8 months ago
Efficient GML-native processors for web-based GIS: techniques and tools
Geography Markup Language (GML) is an XML-based language for the markup, storage, and exchange of geospatial data. It provides a rich geospatial vocabulary and allows flexible doc...
Chia-Hsin Huang, Tyng-Ruey Chuang, Dong-Po Deng, H...
CF
2005
ACM
13 years 9 months ago
An efficient wakeup design for energy reduction in high-performance superscalar processors
In modern superscalar processors, the complex instruction scheduler could form the critical path of the pipeline stages and limit the clock cycle time. In addition, complex schedu...
Kuo-Su Hsiao, Chung-Ho Chen
ICS
2009
Tsinghua U.
14 years 2 months ago
High-performance regular expression scanning on the Cell/B.E. processor
Matching regular expressions (regexps) is a very common workload. For example, tokenization, which consists of recognizing words or keywords in a character stream, appears in ever...
Daniele Paolo Scarpazza, Gregory F. Russell