379 search results - page 57 / 76 » The Imagine Stream Processor |
HPCA
2004
IEEE
14 years 8 months ago
2004
IEEE
This paper proposes and evaluates hardware mechanisms for supporting prescient instruction prefetch--an approach to improving single-threaded application performance by using help...
SC
2009
ACM
14 years 2 months ago
2009
ACM
Manycore processors with wide SIMD cores are becoming a popular choice for the next generation of throughput oriented architectures. We introduce a hardware technique called “di...
IPPS
2006
IEEE
14 years 1 months ago
2006
IEEE
Digital Down Conversion (DDC) is an algorithm, used to lower the amount of samples per second by selecting a limited frequency band out of a stream of samples. A possible DDC algo...
ICCS
2005
Springer
14 years 1 months ago
2005
Springer
Cray X1 Fortran and C/C++ compilers provide a number of loop transformations, notably vectorization and multistreaming, in order to exploit the multistreaming processor (MSP) hard...
ICES
2003
Springer
14 years 27 days ago
2003
Springer
The communication mechanism used by the biological cells of higher animals is an integral part of an organisms ability to tolerate cell deficiency or loss. The massive redundancy ...