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CORR
2011
Springer
210views Education» more  CORR 2011»
12 years 11 months ago
Transmission with Energy Harvesting Nodes in Fading Wireless Channels: Optimal Policies
Wireless systems comprised of rechargeable nodes have a significantly prolonged lifetime and are sustainable. A distinct characteristic of these systems is the fact that the node...
Omur Ozel, Kaya Tutuncuoglu, Jing Yang, Sennur Ulu...
ISCA
2011
IEEE
294views Hardware» more  ISCA 2011»
12 years 11 months ago
Moguls: a model to explore the memory hierarchy for bandwidth improvements
In recent years, the increasing number of processor cores and limited increases in main memory bandwidth have led to the problem of the bandwidth wall, where memory bandwidth is b...
Guangyu Sun, Christopher J. Hughes, Changkyu Kim, ...
CC
2011
Springer
270views System Software» more  CC 2011»
12 years 11 months ago
Subregion Analysis and Bounds Check Elimination for High Level Arrays
For decades, the design and implementation of arrays in programming languages has reflected a natural tension between productivity and performance. Recently introduced HPCS langua...
Mackale Joyner, Zoran Budimlic, Vivek Sarkar
SDM
2011
SIAM
232views Data Mining» more  SDM 2011»
12 years 10 months ago
A Sequential Dual Method for Structural SVMs
In many real world prediction problems the output is a structured object like a sequence or a tree or a graph. Such problems range from natural language processing to computationa...
Shirish Krishnaj Shevade, Balamurugan P., S. Sunda...
ISPD
2012
ACM
288views Hardware» more  ISPD 2012»
12 years 2 months ago
Construction of realistic gate sizing benchmarks with known optimal solutions
Gate sizing in VLSI design is a widely-used method for power or area recovery subject to timing constraints. Several previous works have proposed gate sizing heuristics for power ...
Andrew B. Kahng, Seokhyeong Kang