This paper improves our previous research effort [1] by providing an efficient method for kernel loop unrolling minimisation in the case of already scheduled loops, where circular...
When integrating software threads together to boost performance on a processor with instruction-level parallel processing support, it is rarely clear which code regions should be ...
In this paper, we propose a technique to flexibly implement genetic algorithms for various problems on FPGAs. For the purpose, we propose a basic architecture for GA which consist...
Abstract. We describe a new method for visualising tensor fields using a textured mapped volume rendering approach, tensor-splatting. We use an image order method to calculate the ...
In this paper, a novel data scaling method for pipelined FFT processors is proposed. By using data scaling, the'FFT processor can operateon a wide range of input signals with...