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ISCAS
2008
IEEE
136views Hardware» more  ISCAS 2008»
14 years 4 months ago
VLSI architecture for data-reduced steering matrix feedback in MIMO systems
Abstract— Beamforming (BF) for multiple-input multipleoutput (MIMO) wireless communications systems can improve the error rate performance by spatial separation of the transmitte...
Christoph Studer, Peter Luethi, Wolfgang Fichtner
ISCAS
2007
IEEE
125views Hardware» more  ISCAS 2007»
14 years 4 months ago
CMOS SOCs at 100 GHz: System Architectures, Device Characterization, and IC Design Examples
—This paper investigates the suitability of 90nm and 65nm GP and LP CMOS technology for SOC applications in the 60GHz to 100GHz range. Examples of system architectures and transc...
S. P. Voinigescu, S. T. Nicolson, M. Khanpour, K. ...
AGILE
2007
Springer
184views GIS» more  AGILE 2007»
14 years 4 months ago
Towards Spatial Reasoning in the Semantic Web: A Hybrid Knowledge Representation System Architecture
Environmental databases store a wide variety of data from heterogeneous sources which are described with domain-specific terminologies and refer to distinct locations. In order to ...
Rolf Grütter, Bettina Bauer-Messmer
IPPS
2006
IEEE
14 years 4 months ago
Timed automata based analysis of embedded system architectures
We show that timed automata can be used to model and to analyze timeliness properties of embedded system architectures. Using a case study inspired by industrial practice, we pres...
Martijn Hendriks, Marcel Verhoef
ISVLSI
2006
IEEE
137views VLSI» more  ISVLSI 2006»
14 years 4 months ago
Low Power Layered Space-Time Channel Detector Architecture for MIMO Systems
This paper presents the low power implementation of a Maximum Likelihood (ML) based detector used in the receiver part of a Multiple Input and Multiple Output (MIMO) systems. Low ...
T. Takahashi, Ahmet T. Erdogan, Tughrul Arslan, J....