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ISCA
2012
IEEE
279views Hardware» more  ISCA 2012»
11 years 10 months ago
Staged memory scheduling: Achieving high performance and scalability in heterogeneous systems
When multiple processor (CPU) cores and a GPU integrated together on the same chip share the off-chip main memory, requests from the GPU can heavily interfere with requests from t...
Rachata Ausavarungnirun, Kevin Kai-Wei Chang, Lava...
WWW
2008
ACM
14 years 8 months ago
Computing minimum cost diagnoses to repair populated DL-based ontologies
Ontology population is prone to cause inconsistency because the populating process is imprecise or the populated data may conflict with the original data. By assuming that the int...
Jianfeng Du, Yi-Dong Shen
ISPD
2004
ACM
146views Hardware» more  ISPD 2004»
14 years 1 months ago
Power-aware clock tree planning
Modern processors and SoCs require the adoption of poweroriented design styles, due to the implications that power consumption may have on reliability, cost and manufacturability ...
Monica Donno, Enrico Macii, Luca Mazzoni
SAC
2004
ACM
14 years 1 months ago
A declarative framework for adaptable applications in heterogeneous environments
In this paper we present an approach for developing adaptable software applications. The problem we are facing is that of a (possibly mobile) user who wants to download and execut...
Paola Inverardi, Fabio Mancinelli, Monica Nesi
AI
2007
Springer
13 years 7 months ago
Learning action models from plan examples using weighted MAX-SAT
AI planning requires the definition of action models using a formal action and plan description language, such as the standard Planning Domain Definition Language (PDDL), as inp...
Qiang Yang, Kangheng Wu, Yunfei Jiang