transistors the design of the SoC needs to be moved to a higher level of abstraction. We need to think in processors and interconnects rather than gates and wires. We discuss the n...
This paper presents a publish/subscribe based asynchronous remote method invocation framework (PARMI) aiming to improve performance and programming flexibility. PARMI enables high-...
Transactional memory is emerging as a parallel programming paradigm for multi-core processors. Despite the recent interest in transactional memory, there has been no study to char...
In this work the Low Level Vision Unit (LLVU) of the Heterogeneous and Reconfigurable Machine for Image Analysis (HERMIA) is described. The LLVU consists of the innovative integra...
With increasingly more complex Multi-Processor Systems on Chip (MPSoC) and shortening time-to- market projections, Transaction Level Modeling and Platform Aware Design are seen as...