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ISCA
2007
IEEE
114views Hardware» more  ISCA 2007»
14 years 5 months ago
Matrix scheduler reloaded
From multiprocessor scale-up to cache sizes to the number of reorder-buffer entries, microarchitects wish to reap the benefits of more computing resources while staying within po...
Peter G. Sassone, Jeff Rupley, Edward Brekelbaum, ...
CCGRID
2006
IEEE
14 years 5 months ago
Towards Building an Intelligent Traffic Simulation Platform
Traffic congestion has become a major concern for many cities throughout the world. Simulations provide useful tools for engineer to plan traffic systems and government to make de...
Jian Cao, Minglu Li, Linpeng Huang, Ren Qinsheng, ...
DSD
2006
IEEE
90views Hardware» more  DSD 2006»
14 years 5 months ago
Global Analysis of Resource Arbitration for MPSoC
Modern day applications require use of multi-processor systems for reasons of scalability and power efficiency. As more and more applications are integrated on a single device, m...
Akash Kumar, Bart Mesman, Henk Corporaal, Jef L. v...
HICSS
2006
IEEE
124views Biometrics» more  HICSS 2006»
14 years 5 months ago
Missing the Forest for the Trees - Object Technology's Second Hiatus
Object technology was first created in 1967, but it had to wait till the mid 80’s for widespread acceptance and adoption. We observe that that was not the only hiatus for the te...
Viswanathan Kodaganallur
IPPS
2006
IEEE
14 years 5 months ago
Enhancing L2 organization for CMPs with a center cell
Chip multiprocessors (CMPs) are becoming a popular way of exploiting ever-increasing number of on-chip transistors. At the same time, the location of data on the chip can play a c...
Chun Liu, Anand Sivasubramaniam, Mahmut T. Kandemi...