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ISVLSI
2006
IEEE
115views VLSI» more  ISVLSI 2006»
14 years 4 months ago
Performance and Power Analysis of Globally Asynchronous Locally Synchronous Multi-Processor Systems
This paper investigates the performance and power dissipation of Globally Asynchronous Locally Synchronous (GALS) multi-processor systems. We show that communication loops are a s...
Zhiyi Yu, Bevan M. Baas
ICPP
2003
IEEE
14 years 3 months ago
Performance and Power Impact of Issue-width in Chip-Multiprocessor Cores
In chip-multiprocessors (CMPs), the number of cores and the issue width of each core presents an important design trade-off to balance the amount of TLP and ILP between multi-thre...
Magnus Ekman, Per Stenström
DAC
2005
ACM
14 years 4 hour ago
Sign bit reduction encoding for low power applications
This paper proposes a low power technique, called SBR (Sign Bit Reduction) which may reduce the switching activity in multipliers as well as data buses. Utilizing the multipliers ...
M. Saneei, Ali Afzali-Kusha, Zainalabedin Navabi
ICESS
2004
Springer
14 years 3 months ago
The Modeling for Dynamic Power Management of Embedded Systems
In this paper we present a new modeling technique using software engineering tool Flow Model for modeling and solving the Dynamic Power Management (DPM) with complex behavioral cha...
Jiangwei Huang, Tianzhou Chen, Minjiao Ye, Yi Lian
IOR
2006
118views more  IOR 2006»
13 years 10 months ago
A Stochastic Programming Approach to Power Portfolio Optimization
The DASH model for Power Portfolio Optimization provides a tool which helps decision-makers coordinate production decisions with opportunities in the wholesale power market. The m...
Suvrajeet Sen, Lihua Yu, Talat Genc