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DDECS
2007
IEEE
101views Hardware» more  DDECS 2007»
15 years 3 months ago
A Low Noise and Low Power CMOS Image Sensor with Pixel-level Correlated Double Sampling
—A Low noise and low power CMOS Image Sensor (CIS) with pixel-level Correlated Double Sampling (CDS) is proposed. As the pixel readout circuit using source follower is major read...
Dongsoo Kim, Gunhee Han
CAL
2006
15 years 3 months ago
Performance, power efficiency and scalability of asymmetric cluster chip multiprocessors
This paper evaluates asymmetric cluster chip multiprocessor (ACCMP) architectures as a mechanism to achieve the highest performance for a given power budget. ACCMPs execute serial ...
T. Y. Morad, Uri C. Weiser, A. Kolodnyt, Mateo Val...
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ENGL
2007
180views more  ENGL 2007»
15 years 3 months ago
Reordering Algorithm for Minimizing Test Power in VLSI Circuits
— Power consumption has become a crucial concern in Built In Self Test (BIST) due to the switching activity in the circuit under test(CUT). In this paper we present a novel metho...
K. Paramasivam, K. Gunavathi
JSAC
2006
101views more  JSAC 2006»
15 years 3 months ago
Distributed space-time coding for multihop transmission in power line communication networks
In this paper, we consider transmission in relatively wide-stretched power line communication (PLC) networks, where repeaters are required to bridge the source-to-destination dista...
Lutz H.-J. Lampe, Robert Schober, Simon Yiu
JCM
2007
90views more  JCM 2007»
15 years 3 months ago
Peak to Average Power Ratio Reduction for Multicarrier Systems Using Dirty Paper Coding
— In this paper, we improve the peak to average power ratio reduction scheme for multicarrier systems proposed by Collings and Clarkson by applying dirty paper coding with peak p...
Pin-Hsun Lin, Shih-Chun Lin, Hsuan-Tien Liu, Hsuan...