Sciweavers

782 search results - page 94 / 157
» The Power of Hybrid Acceleration
Sort
View
MICRO
2010
IEEE
149views Hardware» more  MICRO 2010»
13 years 6 months ago
ReMAP: A Reconfigurable Heterogeneous Multicore Architecture
This paper presents ReMAP, a reconfigurable architecture geared towards accelerating and parallelizing applications within a heterogeneous CMP. In ReMAP, threads share a common rec...
Matthew A. Watkins, David H. Albonesi
HCI
2009
13 years 6 months ago
Tooling the Dynamic Behavior Models of Graphical DSLs
Domain-specific modeling is a powerful technique to describe complex systems in a precise but still understandable way. Rapid creation of graphical Domain-Specific Languages (DSLs)...
Tihamer Levendovszky, Tamás Mész&aac...
FCCM
2011
IEEE
251views VLSI» more  FCCM 2011»
13 years 14 days ago
A Scalable Multi-FPGA Platform for Complex Networking Applications
Abstract—Ballooning traffic volumes and increasing linkspeeds require ever high compute power to perform complex real-time processing of network packets. FPGAs have already been...
Sascha Mühlbach, Andreas Koch
EMNLP
2011
12 years 8 months ago
Dual Decomposition with Many Overlapping Components
Dual decomposition has been recently proposed as a way of combining complementary models, with a boost in predictive power. However, in cases where lightweight decompositions are ...
André L. Martins, Noah A. Smith, Már...
FPL
2011
Springer
195views Hardware» more  FPL 2011»
12 years 8 months ago
The Impact of Aging on an FPGA-Based Physical Unclonable Function
—On-chip Physical Unclonable Functions (PUFs) are emerging as a powerful security primitive that can potentially solve several security problems. A PUF needs to be robust against...
Abhranil Maiti, Logan McDougall, Patrick Schaumont