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» The Power of Methods With Parallel Semantics
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IEEEPACT
2002
IEEE
14 years 1 months ago
Optimizing Loop Performance for Clustered VLIW Architectures
Modern embedded systems often require high degrees of instruction-level parallelism (ILP) within strict constraints on power consumption and chip cost. Unfortunately, a high-perfo...
Yi Qian, Steve Carr, Philip H. Sweany
IPPS
2010
IEEE
13 years 6 months ago
Inter-block GPU communication via fast barrier synchronization
The graphics processing unit (GPU) has evolved from a fixedfunction processor with programmable stages to a programmable processor with many fixed-function components that deliver...
Shucai Xiao, Wu-chun Feng
ASPLOS
2009
ACM
14 years 9 months ago
Optimization of tele-immersion codes
As computational power increases, tele-immersive applications are an emerging trend. These applications make extensive demands on computational resources through their heavy use o...
Albert Sidelnik, I-Jui Sung, Wanmin Wu, Marí...
HPCA
2005
IEEE
14 years 9 months ago
Distributing the Frontend for Temperature Reduction
Due to increasing power densities, both on-chip average and peak temperatures are fast becoming a serious bottleneck in processor design. This is due to the cost of removing the h...
Antonio González, Grigorios Magklis, Jos&ea...
SLIP
2004
ACM
14 years 2 months ago
Optical solutions for system-level interconnect
Throughput, power consumption, signal integrity, pin count and routing complexity are all increasingly important interconnect issues that the system designer must deal with. Recen...
Ian O'Connor