A CMOS flash analog-to-digital converter (ADC) designed for high speed and low voltage is presented. Using the Threshold Inverter Quantization (TIQ) comparator technique, a flas...
Abstract-- Multi-context FPGAs (MC-FPGAs) have multiple memory bits per configuration bit forming configuration planes for fast switching between contexts. The additional memory pl...
—In recent years, the famous wiretap channel has been revisited by many researchers and information theoretic secrecy has become an active area of research in this setting. In th...
Traditional pulldown comparators that are used to implement associativeaddressing logic in superscalar microprocessors dissipate energy on a mismatch in any bit position in the co...
Dmitry Ponomarev, Gurhan Kucuk, Oguz Ergin, Kanad ...
Bit-Power Loading (BPL) algorithms are proposed based on Effective SINR Mapping (ESM) techniques. The ESM techniques used are the Exponential ESM (EESM) as well as the Mean Mutual ...
Ioannis Dagres, Natalia Miliou, Andreas Zalonis, A...