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ASAP
2005
IEEE
112views Hardware» more  ASAP 2005»
14 years 1 months ago
On the Advantages of Serial Architectures for Low-Power Reliable Computations
This paper explores low-power reliable microarchitectures for addition. Power, speed, and reliability (both defect- and fault-tolerance) are important metrics of system design, sp...
Valeriu Beiu, Snorre Aunet, Jabulani Nyathi, Ray R...
PATMOS
2005
Springer
14 years 1 months ago
Power - Performance Optimization for Custom Digital Circuits
This paper presents a modular optimization framework for custom digital circuits in the power – performance space. The method uses a static timer and a nonlinear optimizer to max...
Radu Zlatanovici, Borivoje Nikolic
GLVLSI
1998
IEEE
122views VLSI» more  GLVLSI 1998»
14 years 8 days ago
Reducing Power Consumption of Dedicated Processors Through Instruction Set Encoding
With the increased clock frequency of modern, high-performance processors over 500 MHz, in some cases, limiting the power dissipation has become the most stringent design target. ...
Luca Benini, Giovanni De Micheli, Alberto Macii, E...
FCCM
2004
IEEE
103views VLSI» more  FCCM 2004»
13 years 11 months ago
A Dynamically-Reconfigurable, Power-Efficient Turbo Decoder
The development of turbo codes has allowed for nearShannon limit information transfer in modern communication systems. Although turbo decoding is viewed as superior to alternate d...
Jian Liang, Russell Tessier, Dennis Goeckel
JSAC
2006
92views more  JSAC 2006»
13 years 8 months ago
Performance of UWB PSK systems using fully saturated power amplifiers
Abstract--This paper studies the performance of ultra-wideband (UWB) radio communications systems employing phase shift keying (PSK) modulation and fully saturated power amplifiers...
Jia Li, Qingchong Liu, D. P. Taylor