9 search results - page 2 / 2 » The PowerPC Architecture: 64-bit Power with 32-bit Compatibi... |
HPCA
2005
IEEE
14 years 8 months ago
2005
IEEE
A large multi-ported register file is indispensable for exploiting instruction level parallelism (ILP) in today's dynamically scheduled superscalar processors. The number of ...
PLDI
2005
ACM
14 years 1 months ago
2005
ACM
Robust and powerful software instrumentation tools are essential for program analysis tasks such as profiling, performance evaluation, and bug detection. To meet this need, we ha...
IPPS
2000
IEEE
13 years 12 months ago
2000
IEEE
In a machine that follows the dynamically trace scheduled VLIW (DTSVLIW) architecture, VLIW instructions are built dynamically through an algorithm that can be implemented in hard...
SC
2004
ACM
14 years 1 months ago
2004
ACM
This paper is structured as follows. Section 2 gives an architectural description of BlueGene/L. Section 3 analyzes the issue of “computational noise” – the effect that the o...