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CSREAESA
2006
13 years 11 months ago
A Dual-core Embedded System-on-Chip Architecture for Multimedia Signal Processing Applications
- This paper presents a dual-core embedded System-on-Chip for a wide range of application fields with particularly high processing demands, including general signal processing, vid...
Hong Yue, Kui Dai, Zhiying Wang
DESRIST
2010
Springer
193views Education» more  DESRIST 2010»
14 years 2 months ago
Applying Design Research Artifacts for Building Design Research Artifacts: A Process Model for Enterprise Architecture Planning
Enterprise architecture (EA) describes the fundamental structure of an organization from business to IT. EA as a practice as well as a research topic has been around for several ye...
Stephan Aier, Bettina Gleichauf
ASAP
2009
IEEE
157views Hardware» more  ASAP 2009»
14 years 7 months ago
Low-Power ASIP Architecture Exploration and Optimization for Reed-Solomon Processing
The advent of the mobile age has heavily changed the requirements of today’s communication devices. Data transmission over interference-prone wireless channels requires addition...
Andreas Genser, Christian Bachmann, Christian Steg...
MICRO
1998
IEEE
129views Hardware» more  MICRO 1998»
14 years 2 months ago
A Bandwidth-efficient Architecture for Media Processing
Media applications are characterized by large amounts of available parallelism, little data reuse, and a high computation to memory access ratio. While these characteristics are p...
Scott Rixner, William J. Dally, Ujval J. Kapasi, B...
FPGA
1997
ACM
124views FPGA» more  FPGA 1997»
14 years 2 months ago
YARDS: FPGA/MPU Hybrid Architecture for Telecommunication Data Processing
This paper presents a novel system architecture applicable to high-performance and flexible transport data processing which includes complex protocol operation and a network contr...
Akihiro Tsutsui, Toshiaki Miyazaki