6271 search results - page 1160 / 1255 » The RACE network architecture |
CODES
2006
IEEE
14 years 1 months ago
2006
IEEE
During System on Chip (SoC) design, Network on Chip (NoC) prototyping is used for adapting NoC parameters to the application running on the chip. This prototyping is currently don...
DATE
2006
IEEE
14 years 1 months ago
2006
IEEE
This paper presents the design of a Time-Triggered Ethernet (TTE) Switch, which is one of the core units of the Time-Triggered Ethernet system. Time-triggered Ethernet is a commun...
FPGA
2006
ACM
14 years 1 months ago
2006
ACM
While previous research has shown that FPGAs can efficiently implement many types of computations, their flexibility inherently limits their clock rate. Several research groups ha...
FPGA
2006
ACM
14 years 1 months ago
2006
ACM
In this paper, we present reconfigurable hardware architecture for detecting semantics of streaming data on 1+ Gbps networks. The design leverages on the characteristics of contex...
FPL
2006
Springer
14 years 1 months ago
2006
Springer
The use of reconfigurable hardware for network security applications has recently made great strides as FPGA devices have provided larger and faster resources. Regular expressions...