In this paper we present a systematic comparison between two different implementations of a distributed Network on Chip: fully asynchronous and multi-synchronous. The NoC architec...
Abbas Sheibanyrad, Ivan Miro Panades, Alain Greine...
This paper describes a reconfigurable architecture based on field-programmable gate-array (FPGA) technology for monitoring and analyzing network traffic at increasingly high networ...
Sherif Yusuf, Wayne Luk, Morris Sloman, Naranker D...
We motivate the capability approach to network denial-of-service (DoS) attacks, and evaluate the TVA architecture which builds on capabilities. With our approach, rather than send ...
Routers equipped with multiple 802.11 radios can alleviate capacity problems in wireless mesh networks. However, a practical, complete system architecture that can realize the bene...
Krishna N. Ramachandran, Irfan Sheriff, Elizabeth ...
Traditional architectural designs are normally focused on CPUs and have been often decoupled from I/O considerations. They are inefficient for high-speed network processing with a...